CAES has reportedly signed an agreement with Lattice Semiconductor Corporation to sell Lattice FPGAs tolerant to radiations for satellite and space applications. The partnership will enable CAES to offer next-gen on-orbit reconfigurable processing systems for satellite constellations of the future.
The CertusPro™-NX-RT and Certus™-NX-RT FPGAs are developed on the prestigious platform of Lattice Nexus™ offering industry-leading small form factor, power efficiency, and system bandwidth-consuming around four times less power compared to similar devices.
The 28nm devices consist of temperature-resistant SnPb (tin-lead) terminations using a radiation-tolerant FD-SOI (fully-depleted silicon-on-insulator) process of manufacturing. Utilizing over forty years of space heritage and class-leading radiation-hardened expertise in microelectronics, CAES will be eligible for the CertusPro-NX and Certus-NX FPGAs of Lattice for assuring radiation and offering long-term supply and single-lot traceability.
The partnership acknowledges the surging demand for reprogrammable COTS (commercial off-the-shelf) programmable devices across satellite networks that need a high degree of radiation tolerance and redundancy.
According to the Chief Technology Officer of CAES David Young, the partnership with Lattice will commercialize the development of scalable, upgradable, open architectures that are affordable and compatible.
Esam Elashmawi, the Chief Strategy and Marketing Officer of Lattice Semiconductor expressed that the scalable FPGA families of CertusPro-NX and Certus-NX and the deep industry expertise of CAES has helped the company in expediting the integration of new architectures ideally matched for the developing processing requirements of the present space applications.
To supplement this new inclusion to its portfolio of space products and help accelerate the process of design, experts at CAES will offer design and software programming support throughout the process of product development.
The company also provides pre-engineered development tools and IP building blocks including the design software Lattice Radiant® which allows complex, large designs to be efficiently implemented and includes support for approved logic synthesis tools.
CAES is developing a library of standardized, configurable soft IP design cores to further reinforce customer requirements as the company integrates these FPGAs into the designs.
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